@inproceedings{8a73785768d548f5a34bb76abc0ace91,
title = "Behaviour of natural and implanted iron during annealing of multicrystalline silicon wafers",
abstract = "Changes in the concentration of interstitial iron in multicrystalline silicon wafers after high temperature annealing (900ºC) have been monitored by carrier lifetime measurements. Two cooling rates were investigated. The first was considered {\textquoteleft}fast{\textquoteright}, meaning the interstitial Fe had no time to diffuse to precipitation sites, and should therefore be frozen-in, despite being far above the solubility limit at lower temperatures. A second {\textquoteleft}slow{\textquoteright} cool down to 650ºC allowed ample time for the Fe to reach the surfaces or other internal precipitation sites. Surprisingly, in both cases the Fe remained in a supersaturated state. This indicates the precipitation process is not diffusion-limited, and that another energetic barrier to precipitate formation must be present. Since the slow cooling used here is similar to the cooling rate experienced by multicrystalline ingots after crystallisation, this precipitate-impeding mechanism is probably responsible for the surprisingly high interstitial Fe concentrations often found in as-grown multicrystalline silicon wafers.",
keywords = "Crystalline silicon, Iron, Precipitates, Recombination",
author = "Daniel Macdonald and Thomas Roth and Geerligs, {L. J.} and Andres Cuevas",
note = "Publisher Copyright: {\textcopyright} (2005) Trans Tech Publications, Switzerland.; 11th International Autumn Meeting on Gettering and Defect Engineering in Semiconductor Technology, GADEST 2005 ; Conference date: 25-09-2005 Through 30-09-2005",
year = "2005",
doi = "10.4028/www.scientific.net/SSP.108-109.519",
language = "English",
isbn = "9783908451136",
series = "Solid State Phenomena",
publisher = "Trans Tech Publications Ltd.",
pages = "519--524",
editor = "B. Pichaud and A. Claverie and D. Alquier and H. Richter and M. Kittler and H. Richter and M. Kittler",
booktitle = "Gettering and Defect Engineering in Semiconductor Technology XI - GADEST 2005",
address = "Switzerland",
}