Abstract
In this paper, we propose a benchmark for verification of properties of fault-tolerant clock synchronization algorithms, namely, a benchmark of a TTEthernet network, where properties of the clock synchronization algorithm as implemented in a TTEthernet network can be verified, and optimization techniques for verification purposes can be applied. Our benchmark, which assumes non-faulty components, aims to be a basis for verifying configurations which include faulty components, information consistency mechanisms, and for verifying other clock synchronization algorithms
Original language | English |
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Title of host publication | Benchmark for Verification of Fault-Tolerant Clock Synchronization Algorithms |
Editors | G Frehse and M Althoff |
Place of Publication | USA |
Publisher | EasyChair Publications |
Pages | 1-6 |
Edition | Peer Reviewed |
DOIs | |
Publication status | Published - 2016 |
Event | 3rd International Workshop on Applied veRification for Continuous and Hybrid Systems (ARCH 2016) - Vienna, Austria, Australia Duration: 1 Jan 2016 → … http://www.easychair.org/publications/publication_ethics |
Conference
Conference | 3rd International Workshop on Applied veRification for Continuous and Hybrid Systems (ARCH 2016) |
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Country/Territory | Australia |
Period | 1/01/16 → … |
Other | April 12 2016 |
Internet address |