Electrical characterization of impurity-free disordered p-type GaAs

Prakash N.K. Deenapanray; V. A. Coleman; C. Jagadish

doi:10.1149/1.1543335

Electrical characterization of impurity-free disordered p-type GaAs

Prakash N.K. Deenapanray^*, V. A. Coleman, C. Jagadish

^*Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

5 Citations (Scopus)

Abstract

Impurity-free disordered p-GaAs epi layers by SiO₂ or native oxide capping are characterized using deep level transient spectroscopy (DLTS) and capacitance-voltage measurements. Samples, including an uncapped epi layer for reference, were annealed at 900°C for 30 s under Ar ambient. Disordering resulted in an increase in the free hole concentration with the effect being more pronounced for the SiO₂ capping layer. DLTS measurements revealed the corresponding increase in the concentrations of both the Cu and Zn-related deep levels in the disordered epi layers. We relate these changes in electrical properties to segregation effects resulting from the nonequilibrium injection of excess gallium vacancies in the disordered p-type epi layers. We discuss the relative merit of using either SiO₂ or native oxide layers for the integration of optoelectronic devices.

Original language	English
Pages (from-to)	G37-G40
Journal	Electrochemical and Solid-State Letters
Volume	6
Issue number	3
DOIs	https://doi.org/10.1149/1.1543335
Publication status	Published - Mar 2003

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title = "Electrical characterization of impurity-free disordered p-type GaAs",

abstract = "Impurity-free disordered p-GaAs epi layers by SiO2 or native oxide capping are characterized using deep level transient spectroscopy (DLTS) and capacitance-voltage measurements. Samples, including an uncapped epi layer for reference, were annealed at 900°C for 30 s under Ar ambient. Disordering resulted in an increase in the free hole concentration with the effect being more pronounced for the SiO2 capping layer. DLTS measurements revealed the corresponding increase in the concentrations of both the Cu and Zn-related deep levels in the disordered epi layers. We relate these changes in electrical properties to segregation effects resulting from the nonequilibrium injection of excess gallium vacancies in the disordered p-type epi layers. We discuss the relative merit of using either SiO2 or native oxide layers for the integration of optoelectronic devices.",

author = "Deenapanray, {Prakash N.K.} and Coleman, {V. A.} and C. Jagadish",

year = "2003",

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T1 - Electrical characterization of impurity-free disordered p-type GaAs

AU - Deenapanray, Prakash N.K.

AU - Coleman, V. A.

AU - Jagadish, C.

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N2 - Impurity-free disordered p-GaAs epi layers by SiO2 or native oxide capping are characterized using deep level transient spectroscopy (DLTS) and capacitance-voltage measurements. Samples, including an uncapped epi layer for reference, were annealed at 900°C for 30 s under Ar ambient. Disordering resulted in an increase in the free hole concentration with the effect being more pronounced for the SiO2 capping layer. DLTS measurements revealed the corresponding increase in the concentrations of both the Cu and Zn-related deep levels in the disordered epi layers. We relate these changes in electrical properties to segregation effects resulting from the nonequilibrium injection of excess gallium vacancies in the disordered p-type epi layers. We discuss the relative merit of using either SiO2 or native oxide layers for the integration of optoelectronic devices.

AB - Impurity-free disordered p-GaAs epi layers by SiO2 or native oxide capping are characterized using deep level transient spectroscopy (DLTS) and capacitance-voltage measurements. Samples, including an uncapped epi layer for reference, were annealed at 900°C for 30 s under Ar ambient. Disordering resulted in an increase in the free hole concentration with the effect being more pronounced for the SiO2 capping layer. DLTS measurements revealed the corresponding increase in the concentrations of both the Cu and Zn-related deep levels in the disordered epi layers. We relate these changes in electrical properties to segregation effects resulting from the nonequilibrium injection of excess gallium vacancies in the disordered p-type epi layers. We discuss the relative merit of using either SiO2 or native oxide layers for the integration of optoelectronic devices.

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U2 - 10.1149/1.1543335

DO - 10.1149/1.1543335

M3 - Article

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VL - 6

SP - G37-G40

JO - Electrochemical and Solid-State Letters

JF - Electrochemical and Solid-State Letters

IS - 3

ER -

Electrical characterization of impurity-free disordered p-type GaAs

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