ICHAT: Inter-cache hardware-assistant data transfer for heterogeneous chip multiprocessors

Junli Gu*, Bradford M. Beckmann, Ting Cao, Yu Hu

*Corresponding author for this work

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    1 Citation (Scopus)

    Abstract

    Modern heterogeneous multiprocessors integrate CPU and GPU together to provide a boost to computational performance. Data sharing and communication between CPU and GPU has been a critical issue for the final speedup. With tighter integration of CPU and GPU, it has the advantage of sharing and moving data more efficiently in order to leverage the computational power that a GPU can provide. Initially, DMA or PCIe devices were used to transfer data between CPU and GPU with low efficiency and little flexibility. Recently a single address space and coherent cache hierarchies are being adopted in heterogeneous architectures to share data more efficiently. Thus it poses new challenge to understand the communication overheads in this new context and to improve communication efficiencies for these architectures. This paper proposes a novel approach called iCHAT (inter-Cache Hardware-Assistant data Transfer) to manage data transfer between the CPU cache and the GPU cache efficiently. The iCHAT technique proposed in this paper detects the communication patterns and eagerly evicts data from the owner's caches and prepares for the requestor's demand. We implement the iCHAT design in a simulator based on gem5 and an AMD in-house GPU simulator. Experimental results show that the communication related eviction traffic is reduced by an average of 40% and the total directory traffic is reduced by 8% on average. We implement a bounding experiment that provides a quantitative evaluation of inter CPU-GPU transfers and requests to communication data, which indicates that iCHAT could achieve on average 1.4x speedup for Rodinia benchmark suite and 1.2x speedup for AMD SDK APPs.

    Original languageEnglish
    Title of host publicationProceedings - 9th IEEE International Conference on Networking, Architecture, and Storage, NAS 2014
    PublisherInstitute of Electrical and Electronics Engineers Inc.
    Pages242-251
    Number of pages10
    ISBN (Electronic)9781479940875
    DOIs
    Publication statusPublished - 13 Oct 2014
    Event9th IEEE International Conference on Networking, Architecture, and Storage, NAS 2014 - Tianjin, China
    Duration: 6 Aug 20148 Aug 2014

    Publication series

    NameProceedings - 9th IEEE International Conference on Networking, Architecture, and Storage, NAS 2014

    Conference

    Conference9th IEEE International Conference on Networking, Architecture, and Storage, NAS 2014
    Country/TerritoryChina
    CityTianjin
    Period6/08/148/08/14

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