@inproceedings{0984cbcbffb4438f90fa47759a4c1d90,
title = "Low temperature activation of grown-in defects limiting the lifetime of high purity n-type float-zone silicon wafers",
abstract = "We investigate the recombination activity of a bulk silicon defect limiting the lifetime of high quality n-type float-zone (FZ) silicon wafers. By isochronal annealing between 200 and 1100 °C, a defect was found to become activated upon annealing at 450–700 °C, causing an order of magnitude reduction in the bulk lifetime. From photoluminescence imaging, it was evident that recombination active circular patterns were present in these low lifetime samples, suggesting the defect(s) originates from the growth conditions of the ingot. When the samples were passivated by SiNx:H films, a substantial improvement in the bulk lifetime resulted, which we postulate occurred due to hydrogenation of the bulk defects. In contrast, when the samples were annealed at high temperatures (800–1100 °C), the circular recombination active patterns were removed, and the bulk lifetime improved, with the highest lifetime achieved at an annealing temperature of 1100 °C. The experimental results suggest that the defect limiting the lifetime in this FZ material is related to a lattice-impurity defect, which can be permanently annihilated upon annealing at >1100 °C.",
keywords = "Annealing, Bulk lifetime, Defects, Float-zone, Silicon, Vacancy",
author = "Grant, {Nicholas E.} and Rougieux, {Fiacre E.} and Daniel Macdonald",
note = "Publisher Copyright: {\textcopyright} (2016) Trans Tech Publications, Switzerland.; 16th International Conference on Gettering and Defect Engineering in Semiconductor Technology, GADEST 2015 ; Conference date: 20-09-2015 Through 25-09-2015",
year = "2016",
doi = "10.4028/www.scientific.net/SSP.242.120",
language = "English",
isbn = "9783038356080",
series = "Solid State Phenomena",
publisher = "Trans Tech Publications Ltd.",
pages = "120--125",
editor = "Peter Pichler and Peter Pichler",
booktitle = "Gettering and Defect Engineering in Semiconductor Technology XVI",
address = "Switzerland",
}