Abstract
To address the challenges of doping on low nanoscale silicon, a novel approach is proposed by doping a thin layer of SiO2 with trivalent Al impurities in a tunnelling-distance from the silicon surface. The method has its roots in the modulation doping technique familiarly known from III-V semiconductors, which intend to spatially separate the free carriers from parent dopants [1]. The incorporated trivalent impurities in the outermost SiO2 shell form an active site for trapping electrons from the host, thereby creating hole carriers in silicon, thus bypassing the drawbacks of direct doping [2-5]. In analogy to electrostatic doping which aims to replace the donors and acceptors by gate induced free carriers in the silicon channel, this method follows a charge transfer mechanism where the electrons tunnel from silicon and relax into the lower energetic Al defect state. Furthermore, a field-effect induced by the charged defects formed in the dielectric [2,5].
Proof of concept is realized by studying the electronic transport properties on intrinsic silicon nano- and microstructures [7]. It has been demonstrated that the effect of SiO2:Al doping is independent of silicon dimensions and contact materials (Table 1). Device test structures made using e-beam and laser lithography were patterned prior to the doping process on a 20 nm thick silicon-on-insulator. A precisely controlled thermal oxide was grown on the top of the silicon followed by atomic layer deposition (ALD) of one or few monolayers of Al2O3. The formation of the Al defect state is enabled by rapid thermal annealing at 850°C. The test devices were contacted with either Ni- or Pt-based silicide contacts for electrical characterization.
In principle, this approach turns the silicon highly conductive. In addition, it has shown to reduce the contact resistance at the metal-semiconductor interface, and extensively tunes the Schottky barrier height. Transport measurements performed on nanowires down to 50 nm exhibit a resistivity drop of more than two orders of magnitude when compared to the undoped, intrinsic silicon and a minimum contact resistivity forming a non-rectifying junction at the metal-semiconductor interface [6-8]. The longitudinal Hall resistivity calculated from Hall structures is also consistent with the findings of the nanowires and demonstrates high reproducibility of the approach. The area coverage of silicon with SiO2 and Al2O3 layers in combination with Coulomb blockade effects between the charged acceptor states self-regulate the hole doping process (see figure 1). This correspondingly overcomes the dopant fingerprint of nanoscale MOS devices which suffers statistical fluctuations due to random number and distribution of the dopants.
References:
[1] R. Dingle et al., Appl. Phys. Lett., 1978, 33, 665.
[2] D. König et al., Sci. Rep 2017, 7, 46703.
[3] D. Hiller et al., ACS Appl. Mater. Interfaces 2018, 10, 30495.
[4] D. Hiller et al., J. Appl. Phys. 2019, 125, 015301.
[5] D. Hiller et al., J. Phys. D Appl. Phys. 2021, 54, 275304.
[6] I. Ratschinski et al., Phys. Status Solidi A 2023, 220, 2300068.
[7] S. Nagarajan et al., Adv. Mater. Interfaces 2023, 2300600.
[8] S. Nagarajan et al., In 2023 DRC, IEEE 2023.
Proof of concept is realized by studying the electronic transport properties on intrinsic silicon nano- and microstructures [7]. It has been demonstrated that the effect of SiO2:Al doping is independent of silicon dimensions and contact materials (Table 1). Device test structures made using e-beam and laser lithography were patterned prior to the doping process on a 20 nm thick silicon-on-insulator. A precisely controlled thermal oxide was grown on the top of the silicon followed by atomic layer deposition (ALD) of one or few monolayers of Al2O3. The formation of the Al defect state is enabled by rapid thermal annealing at 850°C. The test devices were contacted with either Ni- or Pt-based silicide contacts for electrical characterization.
In principle, this approach turns the silicon highly conductive. In addition, it has shown to reduce the contact resistance at the metal-semiconductor interface, and extensively tunes the Schottky barrier height. Transport measurements performed on nanowires down to 50 nm exhibit a resistivity drop of more than two orders of magnitude when compared to the undoped, intrinsic silicon and a minimum contact resistivity forming a non-rectifying junction at the metal-semiconductor interface [6-8]. The longitudinal Hall resistivity calculated from Hall structures is also consistent with the findings of the nanowires and demonstrates high reproducibility of the approach. The area coverage of silicon with SiO2 and Al2O3 layers in combination with Coulomb blockade effects between the charged acceptor states self-regulate the hole doping process (see figure 1). This correspondingly overcomes the dopant fingerprint of nanoscale MOS devices which suffers statistical fluctuations due to random number and distribution of the dopants.
References:
[1] R. Dingle et al., Appl. Phys. Lett., 1978, 33, 665.
[2] D. König et al., Sci. Rep 2017, 7, 46703.
[3] D. Hiller et al., ACS Appl. Mater. Interfaces 2018, 10, 30495.
[4] D. Hiller et al., J. Appl. Phys. 2019, 125, 015301.
[5] D. Hiller et al., J. Phys. D Appl. Phys. 2021, 54, 275304.
[6] I. Ratschinski et al., Phys. Status Solidi A 2023, 220, 2300068.
[7] S. Nagarajan et al., Adv. Mater. Interfaces 2023, 2300600.
[8] S. Nagarajan et al., In 2023 DRC, IEEE 2023.
| Original language | English |
|---|---|
| Pages | 234 |
| Number of pages | 235 |
| Publication status | Published - 13 Sept 2024 |